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W9425G6JH
8.10.2 Addressing Mode Select (A3) ............................................................................................... 15
8.10.3 CAS Latency field (A6 to A4) ................................................................................................ 16
8.10.4 DLL Reset bit (A8) ................................................................................................................ 16
8.10.5 Mode Register /Extended Mode register change bits (BA0, BA1) ........................................ 16
8.10.6 Extended Mode Register field .............................................................................................. 16
8.10.7 Reserved field ...................................................................................................................... 16
9.
OPERATION MODE .................................................................................................................................... 17
9.1
9.2
9.3
9.4
Simplified Truth Table ...................................................................................................................... 17
Function Truth Table ........................................................................................................................ 18
Function Truth Table for CKE ........................................................................................................... 21
Simplified Stated Diagram ................................................................................................................ 22
10.
ELECTRICAL CHARACTERISTICS ............................................................................................................ 23
10.1
10.2
10.3
10.4
10.5
10.6
10.7
Absolute Maximum Ratings .............................................................................................................. 23
Recommended DC Operating Conditions ........................................................................................ 23
Capacitance ..................................................................................................................................... 24
Leakage and Output Buffer Characteristics ...................................................................................... 24
DC Characteristics ........................................................................................................................... 25
AC Characteristics and Operating Condition .................................................................................... 26
AC Test Conditions .......................................................................................................................... 27
11.
SYSTEM CHARACTERISTICS FOR DDR SDRAM..................................................................................... 29
11.1
11.2
11.3
11.4
11.5
11.6
11.7
11.8
11.9
Table 1: Input Slew Rate for DQ, DQS, and DM .............................................................................. 29
Table 2: Input Setup & Hold Time Derating for Slew Rate ............................................................... 29
Table 3: Input/Output Setup & Hold Time Derating for Slew Rate .................................................... 29
Table 4: Input/Output Setup & Hold Derating for Rise/Fall Delta Slew Rate .................................... 29
Table 5: Output Slew Rate Characteristics (X16 Devices only) ........................................................ 29
Table 6: Output Slew Rate Matching Ratio Characteristics .............................................................. 30
Table 7: AC Overshoot/Undershoot Specification for Address and Control Pins.............................. 30
Table 8: Overshoot/Undershoot Specification for Data, Strobe, and Mask Pins............................... 31
System Notes: .................................................................................................................................. 32
12.
TIMING WAVEFORMS ................................................................................................................................ 34
12.1
12.2
12.3
12.4
12.5
12.6
12.7
12.8
12.9
Command Input Timing .................................................................................................................... 34
Timing of the CLK Signals ................................................................................................................ 34
Read Timing (Burst Length = 4) ....................................................................................................... 35
Write Timing (Burst Length = 4) ....................................................................................................... 36
DM, DATA MASK (W9425G6JH) ..................................................................................................... 37
Mode Register Set (MRS) Timing..................................................................................................... 38
Extend Mode Register Set (EMRS) Timing ...................................................................................... 39
Auto-precharge Timing (Read Cycle, CL = 2) .................................................................................. 40
Auto-precharge Timing (Read cycle, CL = 2), continued .................................................................. 41
Publication Release Date: Aug. 27, 2013
-2-
Revision A03
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